Dual phase-shift symmetrical SVM strategy optimized by dual modulation indices for single-stage isolated DC–AC matrix converter

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Institute of Electrical and Electronics Engineers

Abstract

The single-stage, isolated three-phase dc–ac converter presents significant advantages for applications involving low dc voltages. By eliminating the need for large capacitors, this design facilitates a more compact physical layout. However, the complexity inherent in modulation strategies frequently gives rise to substantial three-phase current harmonics, which adversely affect system performance. Despite numerous efforts documented in the literature to enhance various performance metrics, the effectiveness of these solutions has often been found to be limited. This article presents a new modulation strategy designed to enhance the overall performance of high-frequency link matrix converters. We utilize frequency domain analysis through Fourier transform for our modeling approach. Our strategy optimizes performance by employing a combination of dual shift phase angles and dual modulation indices. Finally, the validation of this strategy was conducted on a three-phase 800 W prototype. Experimental outcomes demonstrated a Total Harmonic Distortion below 2% using a single DSP controller, corroborating theoretical model which predicted a reduction in current stress to 84% of its initial level, and the peak value of low-frequency fluctuation is reduced to 72–78%.

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Keywords

Matrix converters, Vectors, Capacitors, Topology, Switches, Phase modulation, Stress, Soft switching, Power system measurements, Inductors, Current distortion, Frequency domain analysis (FDA), Isolated dc–ac matrix converter (MC), Phase-shift, Space vector modulation (SVM)

Sustainable Development Goals

SDG-09: Industry, innovation and infrastructure

Citation

G. Ye, H. Qin, A. Kumar, R. C. Bansal, E. Gryazina and Y. Deng, "Dual Phase-Shift Symmetrical SVM Strategy Optimized by Dual Modulation Indices for Single-Stage Isolated DC–AC Matrix Converter," in IEEE Transactions on Power Electronics, vol. 41, no. 1, pp. 1297-1311, Jan. 2026, doi: 10.1109/TPEL.2025.3608234.